UPD705100 View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

MFG CO.

UPD705100

V830™ 32-BIT MICROCONTROLLER

NEC => Renesas Technology 

µPD705100

(6) Bus hold timing (2/2)

BCLK (input)

HLDRQ (input)

HLDAK (output)

Note 1

CS0-CS3 (output)Note 2

D0-D31 (input/output)

(write)

BCYST (output)

READY (input)

Ta

Ts

Ti

Th

Th

Th

Ti

Ta

33 32

32

34

35

36

37

16

17

38

39

40

41

20 21

Notes 1. A2-A27 (output), BE0-BE3 (output), ST0-ST3 (output), R/W (output)

2. A28-A31 are output at CS0-CS3 when the chip select function is not used.

The timings of these signals are the same as stated in Note 1.

Remark Dotted lines indicate the high-impedance state.

57

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