M41T62, M41T64, M41T65
Description
Figure 2. M41T64 logic diagram
VCC
XI
XO
SCL
SDA
M41T64
SQW(1)
F32K(2)
VSS
1. Open drain.
2. Defaults to 32 kHz on power-up.
Figure 3. M41T65 logic diagram
VCC
XI
XO
SCL
SDA
M41T65
WDO(1)
IRQ/FT/OUT(1)
1. Open drain.
VSS
Figure 4. M41T62 connections
16 15 14 13
XI 1
12 NC
XO 2
VSS 3
SQW(1) 4
5
QFN
67
11 IRQ/OUT(2)
10 SCL
9 SDA
8
SDA 1
SQW(1) 2
VSS 3
NC 4
LCC
8 SCL
7 NC
6 IRQ/OUT(2)
5 VCC
1. SQW output defaults to 32 kHz upon power-up.
2. Open drain.
DS3840 - Rev 24
page 3/42