P50N02LS View Datasheet(PDF) - Niko Semiconductor
Part Name
Description
MFG CO.
P50N02LS Datasheet PDF : 3 Pages
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NIKO-SEM
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P50N02LS
TO-263 (D2PAK)
On-State Drain Current1
Drain-Source On-State
Resistance1
Forward Transconductance1
ID(ON)
RDS(ON)
gfs
VDS = 10V, VGS = 10V
VGS = 7V, ID = 20A
VGS = 10V, ID = 30A
VDS = 15V, ID = 40A
DYNAMIC
55
13
12
16
A
16
mΩ
15
S
Input Capacitance
Ciss
1400
Output Capacitance
Coss
VGS = 0V, VDS = 15V, f = 1MHz
380
pF
Reverse Transfer Capacitance
Crss
200
Total Gate Charge2
Qg
40
Gate-Source Charge2
Qgs
VDS = 0.5V(BR)DSS, VGS = 10V,
12
nC
Gate-Drain Charge2
Qgd
ID = 30A
25
Turn-On Delay Time2
td(on)
9
Rise Time2
Turn-Off Delay Time2
tr
VDS = 15V, RL = 1Ω
150
nS
td(off)
ID ≅ 35A, VGS = 10V, RGS = 2.5Ω
20
Fall Time2
tf
30
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current
Pulsed Current3
Forward Voltage1
IS
ISM
VSD
IF = IS, VGS = 0V
55
A
170
1.3 V
Reverse Recovery Time
trr
70
nS
Peak Reverse Recovery Current
IRM(REC)
IF = IS, dlF/dt = 100A / µS
200
A
Reverse Recovery Charge
Qrr
1Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2％.
2Independent of operating temperature.
3Pulse width limited by maximum junction temperature.
0.043
µC
REMARK: THE PRODUCT MARKED WITH “P50N02LS”, DATE CODE or LOT #
2
MAY-24-2001
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