MCP3302/04
Note: Unless otherwise indicated, VDD = VREF = 5V, Full differential input configuration, VSS = 0V, FSAMPLE = 100 ksps,
FCLK = 21*FSAMPLE, TA = +25°C.
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
1
10
100
Input Frequency (kHz)
FIGURE 2-13:
Total Harmonic Distortion
(THD) vs. Input Frequency.
80
70
60
50
40
30
20
10
0
-40
-30
-20
-10
0
Input Signal Level (dB)
FIGURE 2-16:
Signal-to-Noise and
Distortion (SINAD) vs. Input Signal Level.
3.1
3
2.9
2.8
2.7
2.6
2.5
-50
0
50
100
150
Temperature (°C)
FIGURE 2-14:
Temperature.
Offset Error vs.
79
78
77
76
75
74
73
72
71
70
69
1
10
100
Input Frequency (kHz)
FIGURE 2-15:
Signal-to-Noise and
Distortion (SINAD) vs. Input Frequency.
13
12
11
10
9
8
7
0
1
2
3
4
5
6
VREF (V)
FIGURE 2-17:
Effective Number of Bits
(ENOB) vs. VREF.
100
90
80
70
60
50
40
30
20
10
0
1
10
100
Input Frequency (kHz)
FIGURE 2-18:
Spurious Free Dynamic
Range (SFDR) vs. Input Frequency.
2011 Microchip Technology Inc.
DS21697F-page 9