MCP3302I View Datasheet(PDF) - Microchip Technology

Part Name

Description

MFG CO.

MCP3302I

13-Bit Differential Input, Low Power A/D Converter with SPI Serial Interface

Microchip Technology 

MCP3302/04

ELECTRICAL SPECIFICATIONS (CONTINUED)

Electrical Characteristics: Unless otherwise noted, all parameters apply at VDD = 5V, VSS = 0V, and VREF = 5V. Full differential

input configuration (Figure 1-5) with fixed common mode voltage of 2.5V. All parameters apply over temperature with

TA = -40°C to +85°C (Note 7). Conversion speed (FSAMPLE) is 100 ksps with FCLK = 21*FSAMPLE

Parameter

Symbol

Min Typ

Max

Units

Conditions

Analog Inputs

Full Scale Input Span

Absolute Input Voltage

Leakage Current

CH0 - CH7 -VREF

—

VREF

V

CH0 - CH7 -0.3

—

VDD + 0.3

V

— 0.001

±1

µA

Switch Resistance

Sample Capacitor

RS

—

1

—

kΩ See Figure 5-3

CSAMPLE

—

25

—

pF See Figure 5-3

Digital Input/Output

Data Coding Format

Binary Two’s Complement

High Level Input Voltage

Low Level Input Voltage

High Level Output Voltage

Low Level Output Voltage

Input Leakage Current

Output Leakage Current

Pin Capacitance

VIH

0.7 VDD —

VIL

—

—

VOH

4.1

—

VOL

—

—

ILI

-10

—

ILO

-10

—

CIN, COUT

—

—

—

0.3 VDD

—

0.4

10

10

10

V

V

V IOH = -1 mA, VDD = 4.5V

V IOL = 1 mA, VDD = 4.5V

µA VIN = VSS or VDD

µA VOUT = VSS or VDD

pF TA = +25°C, F = 1 MHz, Note 1

Timing Specifications:

Clock Frequency (Note 8)

Clock High Time

Clock Low Time

CS Fall To First Rising CLK Edge

Data In Setup time

Data In Hold Time

CLK Fall To Output Data Valid

CLK Fall To Output Enable

CS Rise To Output Disable

FCLK

THI

TLO

TSUCS

TSU

THD

TDO

TEN

TDIS

0.105 —

210

—

210

—

100

—

50

—

50

—

—

—

—

—

—

—

—

—

—

—

2.1

MHz VDD = 5V, FSAMPLE = 100 ksps

—

ns Note 5

—

ns Note 5

—

ns

—

ns

—

ns

125

ns VDD = 5V, see Figure 1-2

200

ns VDD = 2.7V, see Figure 1-2

125

ns VDD = 5V, see Figure 1-2

200

ns VDD = 2.7V, see Figure 1-2

100

ns See test circuits, Figure 1-2

Note 1

CS Disable Time

DOUT Rise Time

TCSH

475

—

—

ns

TR

—

—

100

ns See test circuits, Figure 1-2

Note 1

DOUT Fall Time

TF

—

—

100

ns See test circuits, Figure 1-2

Note 1

Note 1:

2:

3:

4:

5:

6:

7:

8:

9:

This specification is established by characterization and not 100% tested.

See characterization graphs that relate converter performance to VREF level.

VIN = 0.1V to 4.9V @ 1 kHz.

VDD =5V DC ±500 mVP-P @ 1 kHz, see test circuit Figure 1-4.

Maximum clock frequency specification must be met.

VREF = 400 mV, VIN = 0.1V to 4.9V @ 1 kHz.

TSSOP devices are only specified at 25°C and +85°C.

For slow sample rates, see Section 5.2 “Driving the Analog Input” for limitations on clock frequency.

4.5V - 5.5V is the supply voltage range for specified performance.

DS21697F-page 4

 2011 Microchip Technology Inc.

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