Data Sheet, Rev. 3
June 2001
FW802A Low-Power PHY IEEE
Two-Cable Transceiver/Arbiter Device
Electrical Characteristics (continued)
Table 5. Device Characteristics
Parameter
Supply Current:
One Port Active
All Ports Active
Microlow-Power Sleep Mode
PD = 1
High-level Output Voltage
Low-level Output Voltage
High-level Input Voltage
Low-level Input Voltage
Pull-up Current,
/RESET Input
Powerup Reset Time,
/RESET Input
Rising Input Threshold Voltage
/RESET Input
Output Current
Input Current,
LREQ, LPS, PD, SE, SM,
PC[0:2] Inputs
Off-state Output Current,
CTL[0:1], D[0:7], C/LKON I/Os
Power Status Input Threshold
Voltage, CPS Input
Rising Input Threshold Voltage*,
LREQ, CTLn, Dn
Falling Input Threshold Voltage*,
LREQ, CTLn, Dn
Bus Holding Current,
LREQ, CTLn, Dn
Rising Input Threshold Voltage
LPS
Falling Input Threshold Voltage
LPS
Test Conditions
VDD = 3.3 V
IOH max, VDD = min
IOL min, VDD = max
CMOS inputs
CMOS inputs
VI = 0 V
Symbol
IDD
IDD
IDD
IDD
VOH
VOL
VIH
VIL
II
Min
Typ
—
54
—
74
—
50
—
50
VDD – 0.4 —
—
—
0.7VDD
—
—
—
11
—
VI = 0 V
—
2
—
—
VIRST
1.1
—
SYSCLK
IOL/IOH
@ TTL
–16
—
Control, data
IOL/IOH
–12
—
@ CMOS
CNA
IOL/IOH
–16
—
C/LKON
IOL/IOH
–2
—
VI = VDD or 0 V
II
—
—
Max
—
—
—
—
—
0.4
—
0.2VDD
32
—
1.4
16
12
16
2
°±1
Unit
mA
mA
µA
µA
V
V
V
V
µA
ms
V
mA
mA
mA
mA
µA
VO = VDD or 0 V
400 kΩ resistor
—
—
VI = 1/2(VDD)
—
—
IOZ
VTH
VIT+
VIT−
—
VLIH
VLIL
—
—
°±5
µA
7.5
—
8.5
V
VDD/2 + 0.3 — VDD/2 + 0.8 V
VDD/2 – 0.8 — VDD/2 – 0.3 V
250
—
550
µA
—
— 0.24VDD + 1 V
0.24VDD + 0.2 —
—
V
* Device is capable of both differentiated and undifferentiated operation.
Agere Systems Inc.
15