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MT90863(2000) View Datasheet(PDF) - Zarlink Semiconductor Inc

Part Name
Description
MFG CO.
MT90863
(Rev.:2000)
ZARLINK
Zarlink Semiconductor Inc 
MT90863 Datasheet PDF : 35 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
Advance Information MT90863
Read/Write Address:
Reset value:
0AH for FOR0 register,
0BH for FOR1 register,
0000H for all FOR registers.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
OF15 OF14 OF13 OF12 OF11 OF10 OF09 OF08 OF07 OF06 OF05 OF04 OF03 OF02 OF01 OF00
FOR0 register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0 OF23 OF22 OF21 OF20 OF19 OF18 OF17 OF16
FOR1 register
Bit
Name
(Note 1)
Description
15-0 (FOR0)
OFn
Output Offset Bit. When 0, the first bit of the serial output stream has normal
7-0 (FOR1)
alignment with the frame pulse. When 1, the first bit of the serial output stream is
advanced by 1/2 CLK cycle with respect to the frame pulse. See .
15-8 (FOR1) Unused Must be zero for normal operation.
Note 1: n denotes a STio stream number from 0 to 23
Table 12 - Frame Output Offset (FOR) Register Bits
ST-BUS F0i
C16i
STio Stream
STio Stream
Bit 7
Bit 7
offset=0
offset=1
HMVIP F0i
HCLK
C16i
STo Stream
STo Stream
Bit 7
Bit 7
offset=0
offset=1
denotes the starting point of the bit cell
Figure 10 - Examples for Frame Output Offset Timing
19

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