May 1993
Revised March 1999
74LVX04
Low Voltage Hex Inverter
General Description
The LVX04 contains six inverters. The inputs tolerate volt-
ages up to 7V allowing the interface of 5V systems to 3V
systems.
Features
s Input voltage level translation from 5V to 3V
s Ideal for low power/low noise 3.3V applications
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code
Order Number Package Number
Package Description
74LVX04M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
74LVX04SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX04MTC
MTC14
14-Lead Thin Shrink Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An
On
Description
Inputs
Outputs
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