74AVC16373DGG View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
74AVC16373DGG Datasheet PDF : 15 Pages
| |||
Nexperia
74AVC16373
16-bit D-type transparent latch; 3.6 V tolerant; 3-state
10.1 Waveforms and test circuit
VI
VI
nDn input
GND
VOH
VM
tPHL
VM
tPLH
nLE input
GND
VOH
nQn output
VM
VM
tW
tPHL
VM
VM
tPLH
VM
nQn output
VM
VM
VOL
001aam012
VOL
001aam011
Measurement points are given in Table 8.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with
the output load.
VOL and VOH are typical voltage output levels that occur with
the output load.
Figure 7. Latch enable input (nLE) to data output (nQn)
Figure 6. Input (nDn) to output (nQn) propagation delays propagation delays and pulse width
VI
nOE input
VM
VM
GND
VCC
nQn output
LOW-to-OFF
OFF-to-LOW
VOL
VOH
nQn output
HIGH-to-OFF
OFF-to-HIGH
GND
tPLZ
tPZL
tPHZ
VX
VY
outputs
enabled
VM
tPZH
VM
outputs
disabled
outputs
enabled
001aal795
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Figure 8. 3-state enable and disable times
VI
nDn input
VM
GND
VI
th
tsu
th
tsu
nLE input
VM
GND
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Figure 9. Input (nDn) to input (nLE) data set-up and hold times
001aam013
74AVC16373
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 February 2018
© Nexperia B.V. 2018. All rights reserved.
9 / 15
Share Link: 