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74HC20PW,118(2018) View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
MFG CO.
74HC20PW,118
(Rev.:2018)
NXP
NXP Semiconductors. 
74HC20PW,118 Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
74HC20; 74HCT20
Dual 4-input NAND gate
Rev. 4 — 18 November 2015
Product data sheet
1. General description
The 74HC20; 74HCT20 is a dual 4-input NAND gate. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
VCC.
2. Features and benefits
Complies with JEDEC standard JESD7A
Low-power dissipation
Input levels:
For 74HC20: CMOS level
For 74HCT20: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +80 C and from 40 C to +125 C.
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range
74HC20D
40 C to +125 C
74HCT20D
74HC20DB 40 C to +125 C
74HCT20DB
74HC20PW 40 C to +125 C
74HCT20PW
Name
SO14
SSOP14
TSSOP14
Description
plastic small outline package; 14 leads; body width
3.9 mm
Version
SOT108-1
plastic shrink small outline package; 14 leads; body SOT337-1
width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1

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