100351 View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
MFG CO.
100351 Datasheet PDF : 9 Pages
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Industrial Version
PLCC DC Electrical Characteristics
VEE=−4.2V to −5.7V, VCC=VCCA= GND, TC= 0°C to +85°C (Note 5)
Symbol
Parameter
TC = −40°C
Min
Max
TC = 0° to +85°C
Min
Max
Units
Conditions
VOH
VOL
VOHC
VOLC
VIH
Output HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
−1085
−1830
−1095
−1170
−870
−1575
−1565
−870
−1025
−1830
−1035
−1165
−870
−1620
−1610
−870
mV
VIN =VIH (Max)
or VIL (Min)
Loading with
50Ω to −2.0V
mV
VIN = VIH (Min)
or VIL (Max)
Loading with
50Ω to −2.0V
mV Guaranteed HIGH Signal
for All Inputs
VIL
Input LOW Voltage
−1830 −1480 −1830 −1475
mV Guaranteed LOW Signal
for All Inputs
IIL
Input LOW Current
IIH
Input HIGH Current
0.50
0.50
MR
350
350
µA VIN = VIL (Min)
D0–D5
240
240
µA VIN = VIH (Max)
CPa, CPb
350
350
IEE
Power Supply Current
−129
−62
−129
−62
mA Inputs OPEN
Note 5: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under “worst case” conditions.
PLCC AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol
Parameter
fMAX
tPLH
tPHL
tPLH
tPHL
tTLH
tTHL
tS
tH
tPW(H)
Toggle Frequency
Propagation Delay
CPa, CPb to Output
Propagation Delay
MR to Output
Transition Time
20% to 80%, 80% to 20%
Setup Time
D0–D5
MR (Release Time)
Hold Time
D0–D5
Pulse Width HIGH
CPa, CPb, MR
TC = −40°C
Min
Max
375
0.80
1.80
1.10
2.10
0.45
1.70
0.60
2.20
0.60
2.00
TC = +25°C
Min
Max
375
0.80
1.80
1.10
2.10
0.45
1.60
0.30
1.50
0.90
2.00
TC = +85°C
Min
Max
375
0.90
1.90
1.20
2.20
0.45
1.70
Units
Conditions
MHz Figures 2, 3
ns Figures 1, 3
ns Figures 1, 4
ns Figures 1, 3
0.30
ns Figure 5
1.50
Figure 4
0.90
ns Figure 5
2.00
ns Figures 3, 4
5
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