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ST7FDALI View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
ST7FDALI Datasheet PDF : 141 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ST7DALI
Pin
No.
Pin Name
Level
Port / Control
Main
Input
Output Function
(after reset)
Alternate Function
PA7/
11 CKIN_BK/DAL-
IOUT
I/O CT HS X
PA6 /MCO/
12 ICCCLK
I/O CT X
CNTRST//BREAK
ei1
PA5 /ATPWM3/
13
CNTCLK/
ICCDATA/
PLLQ9
I/O CT HS X
PA4/
14 JTDI/
I/O CT HS X
PLLQ8/ATPWM2
PA3/
15
JTCK/
PLLLOCKED/
ATPWM1
I/O CT HS X
PA2/ATPWM0/
16 JTMS/PLLND-
WNTST
I/O CT HS X
ei0
PA1/
17
JTDO/
PLLADDTST/
ATIC
18
PA0 /LTIC/
PLLSTRTTST
19 OSC2
20 OSC1/CLKIN
I/O CT HS X
I/O CT HS X
O
I
X X Port A7
Backup Clock inputDALI Out-
put
X X Port A6
X X Port A5
X X Port A4
X X Port A3
X X Port A2
Main Clock Output or In Circuit
Communication Clock
Testmode Counter Reset/
or External BREAK
Caution: During normal oper-
ation this pin must be pulled-
up, internally or externally (ex-
ternal pull-up of 10k mandato-
ry in noisy environment). This
is to avoid entering ICC mode
unexpectedly during a reset.
In the application, even if the
pin is configured as output,
any reset will put it back in in-
put pull-up.
Auto-Reload Timer PWM3 or
In Circuit Communication
Data/Testmode Counter
Clock/
PLL Q9 Counter
Serial Test Contoller Input/
PLL Q8 CounterAuto-Reload
Timer PWM2
Serial Test Contoller Clock/
PLL Locked Serial Test Con-
toller Input/
PLL Q8 CounterAuto-Reload
Timer PWM1
Auto-Reload Timer PWM0/
Serial Test Contoller Mode
Select/
PLL down-up counter selec-
tion
X X Port A1
Serial Test Controller Output/
PLL Counter clockAuto-Re-
load Timer Input Capture
X X Port A0
Lite Timer Input Capture/PLL
start test
Resonator oscillator inverter output
Resonator oscillator inverter input or Exter-
nal clock input
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