Data Sheet
AMPLIFIER SELECTION
The primary requirement for the current steering mode is an
amplifier with low input bias currents and low input offset vol-
tage. The input offset voltage of an operational amplifier is
multiplied by the variable gain (due to the code dependent
output resistance of the DAC) of the circuit.
A change in this noise gain between two adjacent digital
fractions produces a step change in the output voltage due to
the amplifier input offset voltage. This output voltage change is
superimposed on the desired change in output between the two
codes and gives rise to a differential linearity error, which if
large enough, could cause the DAC to be nonmonotonic.
The input bias current of an operational amplifier also generates
an offset at the voltage output as a result of the bias current
flowing in the feedback resistor, RFB. Most operational
amplifiers have input bias currents low enough to prevent any
significant errors.
AD5425
Common-mode rejection of the operational amplifier is
important in voltage switching circuits, since it produces a code
dependent error at the voltage output of the circuit. Most
operational amplifiers have adequate common-mode rejection
for use at an 8-bit resolution.
Provided the DAC switches are driven from true wideband low
impedance sources (VIN and AGND), they settle quickly. Conse-
quently, the slew rate and settling time of a voltage switching
DAC circuit is determined largely by the output operational
amplifier. To obtain minimum settling time in this configuration,
it is important to minimize capacitance at the VREF node
(voltage output node in this application) of the DAC. This is
done by using low inputs capacitance buffer amplifiers and
careful board design.
Most single-supply circuits include ground as part of the analog
signal range, which requires an amplifier that can handle rail-to-rail
signals. There is a large range of single-supply amplifiers available
from Analog Devices.
Table 7. Suitable Analog Devices Precision References
Part No. Output Voltage (V) Initial Tolerance (%)
ADR01 10
0.05
ADR01 10
0.05
ADR02 5
0.06
ADR02 5
0.06
ADR03 2.5
0.10
ADR03 2.5
0.10
ADR06 3
0.10
ADR06 3
0.10
ADR431 2.5
0.04
ADR435 5
0.04
ADR391 2.5
0.16
ADR395 5
0.10
Temp Drift (ppm/°C)
3
9
3
9
3
9
3
9
3
3
9
9
ISS (mA)
1
1
1
1
1
1
1
1
0.8
0.8
0.12
0.12
Output Noise (µV p-p)
20
20
10
10
6
6
10
10
3.5
8
5
8
Package
SOIC-8
TSOT-23, SC70
SOIC-8
TSOT-23, SC70
SOIC-8
TSOT-23, SC70
SOIC-8
TSOT-23, SC70
SOIC-8
SOIC-8
TSOT-23
TSOT-23
Rev. D | Page 17 of 24