NXP Semiconductors
12. Package outline
DIP14: plastic dual in-line package; 14 leads (300 mil)
HEF4011B
Quad 2-input NAND gate
SOT27-1
D
L
Z
e
b
14
pin 1 index
A2 A
A1
wM
b1
8
ME
c
(e 1)
MH
E
1
7
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
D (1)
E (1)
e
mm
4.2
0.51
3.2
1.73
1.13
0.53
0.38
0.36 19.50 6.48
0.23 18.55 6.20
2.54
inches 0.17
0.02
0.13
0.068 0.021 0.014
0.044 0.015 0.009
0.77
0.73
0.26
0.24
0.1
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
e1
7.62
0.3
L
3.60
3.05
0.14
0.12
ME
8.25
7.80
0.32
0.31
MH
10.0
8.3
0.39
0.33
w
Z (1)
max.
0.254 2.2
0.01 0.087
OUTLINE
VERSION
SOT27-1
IEC
050G04
REFERENCES
JEDEC
JEITA
MO-001
SC-501-14
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-13
Fig 6. Package outline SOT27-1 (DIP14)
HEF4011B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 21 November 2011
© NXP B.V. 2011. All rights reserved.
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