
EDS2504ACTA/08ACTA/16ACTA, EDS2504APTA/08APTA/16APTA
Block Diagram
CLK
CKE
Clock
Generator
Address
Mode
Register
/CS
/RAS
/CAS
/WE
Row
Address
Buffer
&
Refresh
Counter
Column
Address
Buffer
&
Burst
Counter
Bank 3
Bank 2
Bank 1
Bank 0
Sense Amplifier
Column Decoder &
Latch Circuit
Data Control Circuit
DQM
DQ
Data Sheet E0110E30 (Ver. 3.0)
12