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MMUN2111LT3 View Datasheet(PDF) - ON Semiconductor

Part Name
Description
MFG CO.
MMUN2111LT3
ON-Semiconductor
ON Semiconductor 
MMUN2111LT3 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MMUN2111LT1 Series
Preferred Devices
Bias Resistor Transistors
PNP Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the SOT-23
package which is designed for low power surface mount applications.
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
The SOT-23 package can be soldered using wave or reflow. The
modified gull-winged leads absorb thermal stress during soldering
eliminating the possibility of damage to the die.
Available in 8 mm embossed tape and reel. Use the Device Number
to order the 7 inch/3000 unit reel. Replace “T1” with “T3” in the
Device Number to order the 13 inch/10,000 unit reel.
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Collector-Base Voltage
VCBO
50
Collector-Emitter Voltage
VCEO
50
Collector Current
IC
100
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD
246 (Note 1.)
400 (Note 2.)
1.5 (Note 1.)
2.0 (Note 2.)
Thermal Resistance –
Junction-to-Ambient
RθJA
508 (Note 1.)
311 (Note 2.)
Thermal Resistance –
Junction-to-Lead
RθJL
174 (Note 1.)
208 (Note 2.)
Junction and Storage
Temperature Range
TJ, Tstg
–55 to +150
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 x 1.0 inch Pad
Unit
Vdc
Vdc
mAdc
Unit
mW
°C/W
°C/W
°C/W
°C
http://onsemi.com
PIN 1
R1
BASE
(INPUT) R2
PIN 3
COLLECTOR
(OUTPUT)
PIN 2
EMITTER
(GROUND)
3
1
2
SOT–23
CASE 318
STYLE 6
MARKING DIAGRAM
A6x M
A6x = Device Marking
x
= A – L (See
Page 2)
M
= Date Code
DEVICE MARKING INFORMATION
See specific marking information in the device marking table
on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2001
1
November, 2001 – Rev. 2
Publication Order Number:
MMUN2111LT1/D

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