LTC6803 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC6803 Datasheet PDF : 40 Pages
| |||
OPERATION
Table 7. Configuration (CFG) Register Group
REGISTER RD/WR
BIT 7
BIT 6
CFGR0
RD/WR
WDT
GPIO2
CFGR1
RD/WR
DCC8
DCC7
CFGR2
RD/WR
MC4I
MC3I
CFGR3
RD/WR
MC12I
MC11I
CFGR4
RD/WR
VUV[7]
VUV[6]
CFGR5
RD/WR
VOV[7]
VOV[6]
BIT 5
GPIO1
DCC6
MC2I
MC10I
VUV[5]
VOV[5]
BIT 4
LVLPL
DCC5
MC1I
MC9I
VUV[4]
VOV[4]
LTC6803-1/LTC6803-3
BIT 3
CELL10
DCC4
DCC12
MC8I
VUV[3]
VOV[3]
BIT 2
CDC[2]
DCC3
DCC11
MC7I
VUV[2]
VOV[2]
BIT 1
CDC[1]
DCC2
DCC10
MC6I
VUV[1]
VOV[1]
BIT 0
CDC[0]
DCC1
DCC9
MC5I
VUV[0]
VOV[0]
Table 8. Cell Voltage (CV) Register Group
REGISTER RD/WR
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
CVR00
RD
C1V[7]
C1V[6]
C1V[5]
C1V[4]
C1V[3]
CVR01
RD
C2V[3]
C2V[2]
C2V[1]
C2V[0]
C1V[11]
CVR02
RD
C2V[11]
C2V[10]
C2V[9]
C2V[8]
C2V[7]
CVR03
RD
C3V[7]
C3V[6]
C3V[5]
C3V[4]
C3V[3]
CVR04
RD
C4V[3]
C4V[2]
C4V[1]
C4V[0]
C3V[11]
CVR05
RD
C4V[11]
C4V[10]
C4V[9]
C4V[8]
C4V[7]
CVR06
RD
C5V[7]
C5V[6]
C5V[5]
C5V[4]
C5V[3]
CVR07
RD
C6V[3]
C6V[2]
C6V[1]
C6V[0]
C5V[11]
CVR08
RD
C6V[11]
C6V[10]
C6V[9]
C6V[8]
C6V[7]
CVR09
RD
C7V[7]
C7V[6]
C7V[5]
C7V[4]
C7V[3]
CVR10
RD
C8V[3]
C8V[2]
C8V[1]
C8V[0]
C7V[11]
CVR11
RD
C8V[11]
C8V[10]
C8V[9]
C8V[8]
C8V[7]
CVR12
RD
C9V[7]
C9V[6]
C9V[5]
C9V[4]
C9V[3]
CVR13
RD
C10V[3]
C10V[2]
C10V[1]
C10V[0]
C9V[11]
CVR14
RD
C10V[11] C10V[10]
C10V[9]
C10V[8]
C10V[7]
CVR15*
RD
C11V[7]
C11V[6]
C11V[5]
C11V[4]
C11V[3]
CVR16*
RD
C12V[3]
C12V[2]
C12V[1]
C12V[0]
C11V[11]
CVR17*
RD
C12V[11] C12V[10]
C12V[9]
C12V[8]
C12V[7]
*Registers CVR15, CVR16, and CVR17 can only be read if the CELL10 bit in register CFGR0 is low
BIT 2
C1V[2]
C1V[10]
C2V[6]
C3V[2]
C3V[10]
C4V[6]
C5V[2]
C5V[10]
C6V[6]
C7V[2]
C7V[10]
C8V[6]
C9V[2]
C9V[10]
C10V[6]
C11V[2]
C11V[10]
C12V[6]
BIT 1
C1V[1]
C1V[9]
C2V[5]
C3V[1]
C3V[9]
C4V[5]
C5V[1]
C5V[9]
C6V[5]
C7V[1]
C7V[9]
C8V[5]
C9V[1]
C9V[9]
C10V[5]
C11V[1]
C11V[9]
C12V[5]
BIT 0
C1V[0]
C1V[8]
C2V[4]
C3V[0]
C3V[8]
C4V[4]
C5V[0]
C5V[8]
C6V[4]
C7V[0]
C7V[8]
C8V[4]
C9V[0]
C9V[8]
C10V[4]
C11V[0]
C11V[8]
C12V[4]
Table 9. Flag (FLG) Register Group
REGISTER RD/WR
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
FLGR0
RD
C4OV
C4UV
C3OV
C3UV
C2OV
FLGR1
RD
C8OV
C8UV
C7OV
C7UV
C6OV
FLGR2
RD
C12OV*
C12UV*
C11OV*
C11UV*
C10OV
* Bits C11UV, C12UV, C11OV and C12OV are always low if the CELL10 bit in register CFGR0 is high
BIT 2
C2UV
C6UV
C10UV
BIT 1
C1OV
C5OV
C9OV
BIT 0
C1UV
C5UV
C9UV
680313f
23
Share Link: 