CK#
CK
COMMAND
ADDRESS
T0
READ
Bank,
Col n
DQS
DQ
DM
CK#
CK
COMMAND
ADDRESS
T0
READ
Bank a,
Col n
DQS
DQ
DM
Figure 18: READ to WRITE
T1
T2 T2n T3
256Mb: x4, x8, x16
DDR SDRAM
T4 T4n T5 T5n
BST7
NOP
WRITE
NOP
NOP
CL = 2
Bank,
Col b
tDQSS
(NOM)
DO
n
T1
T2 T2n T3
BST7
NOP
NOP
CL = 2.5
DI
b
T4
T5 T5n
WRITE
NOP
tDQSS
(NOM)
DO
DI
n
b
DON’T CARE
TRANSITIONING DATA
NOTE:
1. DO n = data-out from column n.
2. DI b = data-in from column b.
3. Burst length = 4 in the cases shown (applies for bursts of 8 as well; if the burst length is 2, the BST command shown can
be NOP).
4. One subsequent element of data-out appears in the programmed order following DO n.
5. Data-in elements are applied following DI b in the programmed order.
6. Shown with nominal tAC, tDQSCK, and tDQSQ.
7. BST = BURST TERMINATE command;
8. page remains open.
09005aef8076894f
256MBDDRx4x8x16_2.fm - Rev. F 6/03 EN
27
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003 Micron Technology, Inc.