ML2721DH View Datasheet(PDF) - Micro Linear Corporation

Part Name

Description

MFG CO.

ML2721DH

Low IF Digital Cordless Transceiver

Micro Linear Corporation 

PRELIMINARY

CONTROL INTERFACES AND REGISTER DESCRIPTION (continued)

ML2721

Data Bit

B15 (MSB) / DB13

B14 / DB12

B13 / DB11

B12 / DB10

B11 / DB9

B10 / DB8

B9 / DB7

B8 / DB6

B7 / DB5

B6 / DB4

B5 / DB3

Name

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

LOL

B4 / DB2

RXCL

B3 / DB1

RD0

B2 / DB0

B1 / ADB1

B0 (LSB) / ADB0

QPP

ADR1

ADR0

Description

Use

Set All Bits to 0 (zero)

PLL Frequency Shift

PLL Mode in Normal Receive

Operation

Reference Frequency Select

PLL Charge Pump Polarity

0: LO shift is 0Hz for Transmit, 1.024MHz for Receive.

1: LO shift is 1.024MHz for Transmit, 0Hz for Receive.

0: PLL open loop during Receive.

1: PLL closed loop during Receive.

0: 6.144MHz nominal reference frequency.

1: 12.288MHz nominal reference frequency.

0: Freq. sig. > freq. ref.; Charge pump sinks current.

1: Freq. sig. < freq. ref.; Charge pump sources current.

ADR1 = 0

ADR0 = 0

Table 9A. Register 0 — PLL Configuration Register

Data Bit

B15 (MSB) / DB13

B14 / DB12

B13 / DB11

B12 / DB10

B11 / DB9

B10 / DB8

B9 / DB7

B8 / DB6

B7 / DB5

B6 / DB4

B5 / DB3

B4 / DB2

B3 / DB1

B2 / DB0

B1 / ADR1

B0 (LSB) / ADR0

Name

Reserved

Reserved

CHQ11

CHQ10

CHQ9

CHQ8

CHQ7

CHQ6

CHQ5

CHQ4

CHQ3

CHQ2

CHQ1

CHQ0

ADR1

ADR0

Description

PLL frequency shift

Channel frequency select bits

Reference frequency shift

MSB address bit

LSB address bit

Use

Set all bits to 0 (zero)

Divide ratio = fC/0.512

0: Freq. sig. > freq. ref.; Charge pump sinks

ADR1 = 0

ADR0 = 1

Table 9B. Register 1 — Channel Frequency Register

18

PRELIMINARY DATASHEET January, 2000

Share Link: