ADAU1451WBCPZ-RL View Datasheet(PDF) - Analog Devices

Part Name

Description

MFG CO.

ADAU1451WBCPZ-RL

SigmaDSP Digital Audio Processor

Analog Devices 

ADAU1452/ADAU1451/ADAU1450

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Data Sheet

DGND 1

IOVDD 2

VDRIVE 3

SPDIFIN 4

SPDIFOUT 5

AGND 6

AVDD 7

AUXADC0 8

AUXADC1 9

AUXADC2 10

AUXADC3 11

AUXADC4 12

AUXADC5 13

PGND 14

PVDD 15

PLLFILT 16

DGND 17

IOVDD 18

ADAU1452/

ADAU1451/

ADAU1450

TOP VIEW

54 DGND

53 DVDD

52 SDATA_OUT3

51 BCLK_OUT3

50 LRCLK_OUT3/MP9

49 SDATA_OUT2

48 BCLK_OUT2

47 LRCLK_OUT2/MP8

46 MP7

45 MP6

44 SDATA_OUT1

43 BCLK_OUT1

42 LRCLK_OUT1/MP5

41 SDATA_OUT0

40 BCLK_OUT0

39 LRCLK_OUT0/MP4

38 IOVDD

37 DGND

NOTES

1. THE EXPOSED PAD MUST BE GROUNDED BY SOLDERING IT TO A COPPER SQUARE

OF EQUIVALENT SIZE ON THE PCB. IDENTICAL COPPER SQUARES MUST EXIST ON

ALL LAYERS OF THE BOARD, CONNECTED BY VIAS, AND THEY MUST BE CONNECTED

TO A DEDICATED COPPER GROUND LAYER WITHIN THE PCB.

Figure 12. Pin Configuration

Table 23. Pin Function Descriptions

Pin

No. Mnemonic

Internal Pull

Resistor

1 DGND

None

2 IOVDD

None

3 VDRIVE

None

4 SPDIFIN

None

5 SPDIFOUT

Configurable

6 AGND

7 AVDD

8 AUXADC0

9 AUXADC1

None

None

None

None

Description

Digital and I/O Ground Reference. Tie all DGND, AGND, and PGND pins directly together in

a common ground plane.

Input/Output Supply, 1.8 V − 10% to 3.3 V + 10%. Bypass this pin with decoupling capacitors to

Pin 1 (DGND).

PNP Bipolar Junction Transistor-Base Drive Bias Pin for the Digital Supply Regulator. Connect

VDRIVE to the base of an external PNP pass transistor (STD2805 is recommended). If an

external supply is provided directly to DVDD, connect the VDRIVE pin to ground.

Input to the Integrated Sony/Philips Digital Interface Format Receiver. Disconnect this pin when

not in use. This pin is internally biased to IOVDD/2. This pin is nonfunctional on the ADAU1450

and should be left disconnected.

Output from the Integrated Sony/Philips Digital Interface Format Transmitter. Disconnect this

pin when not in use. This pin is internally biased to IOVDD/2. This pin is nonfunctional on the

ADAU1450 and should be left disconnected.

Analog Ground Reference. Tie all DGND, AGND, and PGND pins directly together in a common

ground plane.

Analog (Auxiliary ADC) Supply. Must be 3.3 V ± 10%. Bypass this pin with decoupling capacitors

to Pin 6 (AGND).

Auxiliary ADC Input Channel 0. This pin reads an analog input signal and uses its value in the

DSP program. Disconnect this pin when not in use.

Auxiliary ADC Input Channel 1. This pin reads an analog input signal and uses its value in the

DSP program. Disconnect this pin when not in use.

Rev. C | Page 18 of 180

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