SI1142-A11-GMR View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
SI1142-A11-GMR Datasheet PDF : 76 Pages
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Si1141/42/43
4.2. Command Protocol
The I2C map implements a bidirectional message box between the host and the Si1141/42/43 Sequencer. Host-
writable I2C registers facilitate host-to-Si1141/42/43 communication, while read-only I2C registers are used for
Si1141/42/43-to-host communication.
Unlike the other host-writable I2C registers, the COMMAND register causes the internal sequencer to wake up from
Standby mode to process the host request.
When a command is executed, the RESPONSE register is updated. Typically, when there is no error, the upper
four bits are zeroes. To allow command tracking, the lower four bits implement a 4-bit circular counter. In general, if
the upper nibble of the RESPONSE register is non-zero, this indicates an error or the need for special processing.
The PARAM_WR and PARAM_RD registers are additional mailbox registers.
In addition to the registers in the I2C map, there are environmental parameters accessible through the Command/
Response interface. These parameters are stored in the internal ram space. These parameters generally take
more I2C accesses to read and write. The Parameter RAM is described in "4.6. Parameter RAM" on page 52.
For every write to the Command register, the following sequence is required:
1. Write 0x00 to Command register to clear the Response register.
2. Read Response register and verify contents are 0x00.
3. Write Command value from Table 5 into Command register.
4. Read the Response register and verify contents are now non-zero. If contents are still 0x00, repeat this step.
Note: Step 4 is not applicable to the Reset Command because the device will reset itself and does not increment the Response
register after reset. No Commands should be issued to the device for at least 1 ms after a Reset is issued.
The Response register will be incremented upon the successful completion of a Command. If the Response
register remains 0x00 for over 25 ms after the Command write, the entire Command process should be repeated
from Step 1.
Table 5. Command Register Summary
COMMAND Register
PARAM_W PARAM_RD
Error Code in
Name
Encoding R Register Register RESPONSE Register
Description
PARAM_QUERY 100 aaaaa —
nnnn nnnn
Reads the parameter pointed to
by bitfield [4:0] and writes value
to PARAM_RD.
See Table 10 for parameters.
PARAM_SET 101 aaaaa dddd
dddd
nnnn nnnn
Sets parameter pointed by bit-
field [4:0] with value in
PARAM_WR, and writes value
out to PARAM_RD. See
Table 10 for parameters.
PARAM_AND 110 aaaaa dddd
dddd
nnnn nnnn
Performs a bit-wise AND
between PARAM_WR and
Parameter pointed by bitfield
[4:0], writes updated value to
PARAM_RD.
See Table 10 for parameters.
20
Rev. 1.4
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