74HCT166(2015) View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
74HCT166 Datasheet PDF : 20 Pages
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74HC166; 74HCT166
8-bit parallel-in/serial out shift register
Rev. 4 — 28 December 2015
Product data sheet
1. General description
The 74HC166; 74HCT166 is an 8-bit serial or parallel-in/serial-out shift register. The
device features a serial data input (DS), eight parallel data inputs (D0 to D7) and a serial
output (Q7). When the parallel enable input (PE) is LOW, the data from D0 to D7 is loaded
into the shift register on the next LOW-to-HIGH transition of the clock input (CP). When
PE is HIGH, data enters the register serially at DS with each LOW-to-HIGH transition of
CP. When the clock enable input (CE) is LOW data is shifted on the LOW-to-HIGH
transitions of CP. A HIGH on CE disables the CP input. Inputs include clamp diodes which
enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Synchronous parallel-to-serial applications
Synchronous serial input for easy expansion
Complies with JEDEC standard no. 7A
Input levels:
For 74HC166: CMOS level
For 74HCT166: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
74HC166D 40 C to +125 C SO16
74HCT166D
74HC166DB 40 C to +125 C SSOP16
74HCT166DB
74HC166PW 40 C to +125 C TSSOP16
Description
Version
plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
plastic shrink small outline package; 16 leads; body width SOT338-1
5.3 mm
plastic thin shrink small outline package; 16 leads; body
width 4.4 mm
SOT403-1
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