Nexperia
11. Waveforms and test circuit
74HC126; 74HCT126
Quad buffer/line driver; 3-state
9,
Q$LQSXW
*1'
92+
Q<RXWSXW
92/
90
W3+/
90
W7+/
W3/+
9,
W7/+
PQD
Fig 6.
Measurement points are given in Table 8.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Input (nA) to output (nY) propagation delays
Q2(LQSXW
9,
*1'
RXWSXW
/2:WR2))
2))WR/2:
9&&
92/
92+
RXWSXW
+,*+WR2))
2))WR+,*+
*1'
90
W3/=
W3=/
W3+=
9;
9<
RXWSXWV
HQDEOHG
90
W3=+
RXWSXWV
GLVDEOHG
90
RXWSXWV
HQDEOHG
PQD
Fig 7.
Measurement points are given in Table 8.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Enable and disable times
Table 8. Measurement points
Type
Input
74HC126
74HCT126
VM
0.5VCC
1.3 V
Output
VM
0.5VCC
1.3 V
VX
0.1VCC
0.1VCC
VY
0.9VCC
0.9VCC
74HC_HCT126
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 1 December 2015
© Nexperia B.V. 2017. All rights reserved
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