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CY7C1424KV18(2014) View Datasheet(PDF) - Cypress Semiconductor

Part Name
Description
MFG CO.
CY7C1424KV18
(Rev.:2014)
Cypress
Cypress Semiconductor 
CY7C1424KV18 Datasheet PDF : 30 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CY7C1423KV18/CY7C1424KV18
Write Cycle Descriptions
The write cycle description table for CY7C1424KV18 follows. [9, 10]
BWS0 BWS1 BWS2 BWS3 K
L
L
L
L L–H
K
Comments
– During the data portion of a write sequence, all four bytes (D[35:0]) are written into
the device.
L
L
L
L
– L–H During the data portion of a write sequence, all four bytes (D[35:0]) are written into
the device.
L
H
H
H L–H – During the data portion of a write sequence, only the lower byte (D[8:0]) is written
into the device. D[35:9] remains unaltered.
L
H
H
H
– L–H During the data portion of a write sequence, only the lower byte (D[8:0]) is written
into the device. D[35:9] remains unaltered.
H
L
H
H L–H – During the data portion of a write sequence, only the byte (D[17:9]) is written into
the device. D[8:0] and D[35:18] remains unaltered.
H
L
H
H
– L–H During the data portion of a write sequence, only the byte (D[17:9]) is written into
the device. D[8:0] and D[35:18] remains unaltered.
H
H
L
H L–H – During the data portion of a write sequence, only the byte (D[26:18]) is written into
the device. D[17:0] and D[35:27] remains unaltered.
H
H
L
H
– L–H During the data portion of a write sequence, only the byte (D[26:18]) is written into
the device. D[17:0] and D[35:27] remains unaltered.
H
H
H
L L–H – During the data portion of a write sequence, only the byte (D[35:27]) is written into
the device. D[26:0] remains unaltered.
H
H
H
L
– L–H During the data portion of a write sequence, only the byte (D[35:27]) is written into
the device. D[26:0] remains unaltered.
H
H
H
H L–H – No data is written into the device during this portion of a write operation.
H
H
H
H
– L–H No data is written into the device during this portion of a write operation.
Notes
9. X = “Don't Care,” H = Logic HIGH, L = Logic LOW, represents rising edge.
10. Is based on a write cycle that was initiated in accordance with the Truth Table on page 9. BWS0, BWS1, BWS2,and BWS3 can be altered on different portions of a write
cycle, as long as the setup and hold requirements are achieved.
Document Number: 001-57829 Rev. *F
Page 10 of 30

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