Philips Semiconductors
Phase-locked-loop with lock detector
Product specification
74HC/HCT7046A
Fig.8 Phase comparator 2: average output
voltage versus input phase difference:
VDEMOUT = VPC2OUT = V---4--C-π--C-- ( φSIGIN – φCOMPIN)
φDEMOUT = ( φSIGIN –˙φCOMPIN) .
Fig.9 Typical waveforms for PLL using phase
comparator 2, loop locked at fo.
December 1990
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