74HC5555D,118 View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

MFG CO.

74HC5555D,118

Programmable delay timer with oscillator

NXP Semiconductors. 

Philips Semiconductors

Programmable delay timer with oscillator

Product specification

74HC/HCT5555

TEST MODE

Set S3 to a logic LOW level, this will divide the 24 stage counter into three, parallel clocking, 8-stage counters. Set S0,

S1 and S2 to a logic HIGH level, this programs the counter to divide-by 28 (256). Apply a trigger pulse and clock in 255

pulses, this sets all flip-flop stages to a logic HIGH level. Set S3 to a logic HIGH level, this causes the counter to divide-by

224. Clock one more pulse into the RS input, this causes a logic 0 to ripple through the counter and output Q/Q goes from

HIGH-to-LOW level. This method of testing the delay counter is faster than clocking in 224 (16 777 216) clock pulses.

FUNCTION TABLE

MR

H

L

L

INPUTS

A

X

↑

X

Notes

1. H = HIGH voltage level

L = LOW voltage level

X = don't care

↑ = LOW-to-HIGH transition

↓ = HIGH-to-LOW transition.

OUTPUTS

B

Q

Q

X

L

H

X

one HIGH level

one LOW level

output pulse

output pulse

↓

one HIGH level

one LOW level

output pulse

output pulse

September 1993

6

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