MPC5200CVR466BR2 View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
MPC5200CVR466BR2 Datasheet PDF : 72 Pages
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2
USB_OE
USB_TXN
USB_TXP
4
3
1
1
4
3
Figure 31. Timing Diagram—USB Output Line
1.3.12 SPI
Table 36. Timing Specifications — SPI Master Mode, Format 0 (CPHA = 0)
Sym
Description
Min
Max
1
Cycle time
4
1024
2
Clock high or low time
2
512
3
Slave select to clock delay
15.0
—
4
Output Data valid after Slave Select (SS)
—
20.0
5
Output Data valid after SCK
—
20.0
6
Input Data setup time
20.0
—
7
Input Data hold time
20.0
—
8
Slave disable lag time
15.0
—
9
Sequential transfer delay
1
—
10
Clock falling time
—
7.9
11
Clock rising time
—
7.9
1 Inter Peripheral Clock is defined in the MPC5200B User’s Manual (MPC5200BUM).
Units
SpecID
IP-Bus Cycle(1) A11.1
IP-Bus Cycle(1) A11.2
ns
A11.3
ns
A11.4
ns
A11.5
ns
A11.6
ns
A11.7
ns
A11.8
IP-Bus Cycle(1) A11.9
ns
A11.10
ns
A11.11
NOTE
Output timing is specified at a nominal 50 pF load.
MPC5200B Data Sheet, Rev. 4
Freescale Semiconductor
41
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