PEB 2055
PEF 2055
Overview
1.6 Using the EPIC-S
The EPIC-S is based on the same technology as the EPIC-1 aside from only providing
CFI port 0 and CFI port 1. Therefore this User’s Manual applies to both, the EPIC-S and
the EPIC-1.
When using the EPIC-S the user has to be aware not to program connections that would
imply the not supported CFI ports.
The following points require specific attention:
1. During power up the EPIC-S must be supplied with an external Hardware Reset.
2. Register bit OMDR:CSB may be programmed to high (switch off standby of CFI
interface) only after a Control Memory reset procedure with MACR:CMC3..0 = 0H.
3. The pins not available with respect to the EPIC-1 (PEB 2055) must not be
programmed as outputs.
Semiconductor Group
17