MPC9230FN View Datasheet(PDF) - Integrated Device Technology
Part Name
Description
MFG CO.
MPC9230FN Datasheet PDF : 16 Pages
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MPC9230 Data Sheet
800MHZ LOW VOLTAGE PECL CLOCK SYNTHESIZER
Table 9. AC Characteristics (VCC = 3.3 V ± 5%, TA = –40°C to +85°C)(1)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
fXTAL
Crystal Interface Frequency Range
10
fREF
FREF_EXT Reference Frequency Range
10
fVCO
VCO Frequency Range(3)
800
fMAX
Output Frequency
N = 11 (÷1)
400
N = 00 (÷2)
200
N = 01 (÷4)
100
N = 10 (÷8)
50
fS_CLOCK Serial Interface Programming Clock Frequency(4)
0
tP,MIN
Minimum Pulse Width
(S_LOAD, P_LOAD)
50
DC
Output Duty Cycle
45
20
(fVCO,MAX÷M)·4(2)
1500
MHz
MHz
MHz
750.00
375.00
187.50
93.75
MHz
MHz
MHz
MHz
10
MHz
ns
50
55
%
tr, tf
Output Rise/Fall Time
0.05
tS
Setup Time
S_DATA to S_CLOCK
20
S_CLOCK to S_LOAD
20
M, N to P_LOAD
20
0.3
ns 20% to 80%
ns
ns
ns
tH
Hold Time
S_DATA to S_CLOCK
20
ns
M, N to P_LOAD
20
ns
tJIT(CC) Cycle-to-Cycle Jitter
N = 11 (÷1)
N = 00 (÷2)
N = 01 (÷4)
N = 10 (÷8)
30
80
ps
35
90
ps
45
130
ps
55
160
ps
tJIT(CC) Period Jitter
N = 11 (÷1)
N = 00 (÷2)
N = 01 (÷4)
N = 10 (÷8)
20
60
ps
25
70
ps
35
120
ps
50
140
ps
tLOCK
Maximum PLL Lock Time
10
ms
1. AC characteristics apply for parallel output termination of 50 Ω to VTT.
2. The maximum frequency on FREF_EXT is a function of the max. VCO frequency and the M counter. M should be higher than 160 for stable PLL operation.
3. The input frequency fXTAL and the PLL feedback divider M must match the VCO frequency range: fVCO = fXTAL ⋅ M ÷ 4.
4. The frequency of S_CLOCK is limited to 10 MHz in serial programming mode. S_CLOCK can be switched at higher frequencies when used as test clock
in test mode 6. See APPLICATIONS INFORMATION for more details.
MPC9230 REVISION 8 MARCH 29, 2010
7
©2010 Integrated Device Technology, Inc.
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