M6MGB162S2BVP View Datasheet(PDF) - Mitsumi
Part Name
Description
MFG CO.
M6MGB162S2BVP Datasheet PDF : 29 Pages
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MITSUBISHI LSIs
M6MGB/T162S2BVP
16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS
3.3V-ONLY FLASH MEMORY &
2,097,152-BIT (262,144-WORD BY 8-BIT) CMOS SRAM
Stacked-MCP (Multi Chip Package)
AC ELECTRICAL CHARACTERISTICS (S-Vcc=2.7 ~ 3.6V, unless otherwise noted)
(1) TEST CONDITIONS
Supply voltage
Input pulse
Input rise time and fall time
2.7V~3.6V
VIH=2.2V,VIL=0.4V
5ns
Reference level
VOH=VOL=1.5V
Transition is measured ±500mV from
steady state voltage.(for ten,tdis)
Output loads
Fig.1,CL=30pF
CL=5pF (for ten,tdis)
1TTL
DQ
CL
Including scope and
jig capacitance
Fig.1 Output load
(2) READ CYCLE
Symbol
tCR
ta(A)
ta(CE)
ta(OE)
tdis(CE)
tdis(OE)
ten(CE)
ten(OE)
tV(A)
Parameter
Read cycle time
Address access time
Chip select access time
Output enable access time
Output disable time after S-CE low
Output disable time after OE# high
Output enable time after S-CE high
Output enable time after OE# low
Data valid time after address
Limits
SRAM
Min
Max
85
85
85
45
30
30
10
5
10
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
(3) WRITE CYCLE
Symbol
Parameter
tCW
tw(W)
tsu(A)
tsu(A-WH)
tsu(CE)
tsu(D)
th(D)
trec(W)
tdis(W)
tdis(OE)
ten(W)
ten(OE)
Write cycle time
Write pulse width
Address setup time
Address setup time with respect to WE#
Chip select setup time
Data setup time
Data hold time
Write recovery time
Output disable time from WE# low
Output disable time from OE# high
Output enable time from WE# high
Output enable time from OE# low
Limits
SRAM
Min
Max
85
60
0
70
70
35
0
0
30
30
5
5
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
26
Sep.1999 , Rev.2.0
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