Philips Semiconductors
Dual D-type flip-flop with set and reset
Product specification
74ALS74A
LOGIC DIAGRAM
SD 4, 10
RD 1, 13
CP 3, 11
D 2, 12
VCC = Pin 14
GND = Pin 7
5, 9
Q
6, 8
Q
SF00048
FUNCTION TABLE
INPUTS
OUTPUTS
OPERATING
SD RD CP D
Q
Q
MODE
LHXX
H
L Asynchronous set
HLXX
L
H Asynchronous reset
L LXX
H
H Undetermined*
HH↑ h
H
L Load “1”
HH↑
l
L
H Load “0”
H H ↑ X NC NC Hold
H=
h=
L=
l=
NC =
X=
↑=
↑=
*=
High voltage level
High state must be present one setup time prior to
Low-to-High clock transition
Low voltage level
Low state must be present one setup time prior to
Low-to-High clock transition
No change from the previous setup
Don’t care
Low-to-High clock transition
Not Low-to-High clock transition
Both outputs will be High while both SD and RD are Low,
but the output states are unpredictable if SD and RD go
High simultaneously
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
VCC
VIN
IIN
VOUT
IOUT
Tamb
Tstg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC
VIH
VIL
IIk
IOH
IOL
Tamb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to VCC
16
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
LIMITS
UNIT
MIN
NOM
MAX
4.5
5.0
5.5
V
2.0
V
0.8
V
–18
mA
–0.4
mA
8
mA
0
+70
°C
1996 Jul 01
3