LT1769IGN View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LT1769IGN
Linear Technology
LT1769IGN Datasheet PDF : 16 Pages
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LT1769
APPLICATIONS INFORMATION
Example: VIN = 19V, VBAT = 12.6V, IBAT = 2A:
PBIAS = (3.5mA)(19) + 1.5mA(12.6)
[ ] + (12.6)2
19
7.5mA + (0.012)(2000mA)
= 0.35W
PDRIVER
=
(2)(12.6)21+
55(19)
1320.6
=
0.43W
PSW
=
(2)2(0.16)(12.6)
19
+
10−9(19)(2)(200kHz)
= 0.42 + 0.08 = 0.5W
Total Power in the IC is: 0.35 + 0.43 + 0.5 = 1.3W
Temperature rise will be (1.3W)(35°C/W) = 46°C. This
assumes that the LT1769 is properly heat sunk by con-
necting the eleven fused ground pins to expanded traces
and that the PC board has a backside or internal plane for
heat spreading.
The PDRIVER term can be reduced by connecting the boost
diode D2 (see Figure 7) to a lower system voltage (lower
than VBAT) instead of VBAT.
Then
PDRIVER
=
(IBAT )(VBAT )(VX )1+
55(VIN )
VX
30
For example, VX = 3.3V then:
( )( )(( )) PDRIVER =
2A
12.6V
3.3V
1+
3.3V
30
= 0.09 W
55 19V
The average IVX required is:
PDRIVER = 0.09 W = 28mA
VX
3.3V
The previous example shows the dramatic drop in driver
power dissipation when the boost diode (D2) is connected
to an external 3.3V source instead of the 12.6V battery.
PDRIVER drops from 0.43W to 0.09W resulting in an
approximately 12°C drop in junction temperature.
Fused-lead packages conduct most of their heat out the
leads. This makes it very important to provide as much PC
board copper around the leads as is practical. Total
SW
C2
LT1769
L1
BOOST
D2
SPIN
VX IVX +
10µF
1769 F07
Figure 7. Lower VBOOST
thermal resistance of the package-board combination is
dominated by the characteristics of the board in the
immediate area of the package. This means both lateral
thermal resistance across the board and vertical thermal
resistance through the board to other copper layers. Each
layer acts as a thermal heat spreader that increases the
heat sinking effectiveness of extended areas of the board.
Total board area becomes an important factor when the
area of the board drops below about 20 square inches. The
graph in Figure 8 shows thermal resistance vs board area
for 2-layer and 4-layer boards with continuous copper
planes. Note that 4-layer boards have significantly lower
thermal resistance, but both types show a rapid increase
for reduced board areas. Figure 9 shows actual measured
lead temperatures for chargers operating at full current.
Battery voltage and input voltage will affect device power
dissipation, so the data sheet power calculations must be
used to extrapolate these readings to other situations.
Vias should be used to connect board layers together.
Planes under the charger area can be cut away from the
rest of the board and connected with vias to form both a
low thermal resistance system and to act as a ground plane
for reduced EMI.
Glue-on, chip-mounted heat sinks are effective only in
moderate power applications where the PC board copper
cannot be used, or where the board size is small. They offer
very little improvement in a properly laid out multilayer
board of reasonable size.
Higher Duty Cycle for the LT1769 Battery Charger
Maximum duty cycle for the LT1769 is typically 90%, but
this may be too low for some applications. For example, if
1769fa
13
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