TS80C51RA2/RD2
TS83C51RB2/RC2/RD2
TS87C51RB2/RC2/RD2
5.1. Pin Description for 64/68 pin Packages
Port 4 and Port 5 are 8-bit bidirectional I/O ports with internal pull-ups. Pins that have 1 written to them are pulled
high by the internal pull ups and can be used as inputs.
As inputs, pins that are externally pulled low will source current because of the internal pull-ups.
Refer to the previous pin description for other pins.
Table 2. 64/68 Pin Packages Configuration
VSS
VCC
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P3.0
P3.1
PLCC68
51
17
15
14
12
11
9
6
5
3
19
21
22
23
25
27
28
29
54
55
56
58
59
61
64
65
34
39
SQUARE VQFP64
1.4
9/40
8
6
5
3
2
64
61
60
59
10
12
13
14
16
18
19
20
43
44
45
47
48
50
53
54
25
28
Rev. C - 06 March, 2001
9