TS80C52X2-LCBB View Datasheet(PDF) - Temic Semiconductors
Part Name
Description
MFG CO.
TS80C52X2-LCBB Datasheet PDF : 54 Pages
| |||
TS80C52X2
Table 4. CKCON Register
CKCON - Clock Control Register (8Fh)
7
6
5
4
3
2
-
-
-
-
-
-
1
0
-
X2
Bit
Bit
Number Mnemonic
Description
7
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
1
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
CPU and peripheral clock bit
0
X2
Clear to select 12 clock periods per machine cycle (STD mode, FOSC=FXTAL/2).
Set to select 6 clock periods per machine cycle (X2 mode, FOSC=FXTAL).
Reset Value = XXXX XXX0b
Not bit addressable
Rev. B - Jan. 25, 1999
9
Preliminary
Share Link: 