AD7868AR View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
AD7868AR Datasheet PDF : 16 Pages
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AD7868
TIMING CHARACTERISTICS1, 2 (VDD = +5 V ؎ 5%, VSS = –5 V ؎ 5%, AGND = DGND = 0 V)
Parameter
Limit at TMIN, TMAX Limit at TMIN, TMAX
(A, B Versions)
(T Version)
Units
Conditions/Comments
ADC TIMING
t1
t23
t3
t4
t54
t6
t135
50
440
100
20
100
155
4
100
2 RCLK +200 to
3 RCLK + 200
50
440
100
20
100
155
4
100
2 RCLK +200 to
3 RCLK + 200
ns min
ns min
ns min
ns min
ns max
ns max
ns min
ns max
ns typ
CONVST Pulse Width
RCLK Cycle Time, Internal Clock
RFS to RCLK Falling Edge Setup Time
RCLK Rising Edge to RFS
RCLK to Valid Data Delay, CL = 35 pF
Bus Relinquish Time after RCLK
CONVST to RFS Delay
DAC TIMING
t7
50
t8
75
t96
150
t10
30
t11
75
t12
40
50
ns min TFS to TCLK Falling Edge
100
ns min TCLK Falling Edge to TFS
200
ns min TCLK Cycle Time
40
ns min Data Valid to TCLK Setup Time
100
ns min Data Valid to TCLK Hold Time
40
ns min LDAC Pulse Width
NOTES
1Timing specifications are sample tested at +25°C to ensure compliance. All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a
voltage level of 1.6 V.
2Serial timing is measured with a 4.7 kΩ pull-up resistor on DR and RFS and a 2 kΩ pull-up resistor on RCLK . The capacitance on all three output is 35 pF.
3When using internal clock, RCLK mark/space ratio (measured from a voltage level of 1.6 V) range is 40/60 to 60/40. For external clock, RCLK mark/space ratio =
external clock mark/space ratio.
4DR will drive higher capacitance loads but this will add to t5 since it increases the external RC time constant (4.7 kΩ/CL) and hence the time to reach 2.4 V.
5Time 2 RCLK to 3 RCLK depends on conversion start to ADC clock synchronization.
6TCLK mark/space ratio is 40/60 to 60/40.
ABSOLUTE MAXIMUM RATINGS*
(TA = +25°C unless otherwise noted)
VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
VSS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –7 V
AGND to DGND . . . . . . . . . . . . . . . . . –0.3 V to VDD +0.3 V
VOUT to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . VSS to VDD
VIN to AGND . . . . . . . . . . . . . . . . VSS –0.3 V to VDD + 0.3 V
RO ADC to AGND . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
RO DAC to AGND . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
RI DAC to AGND . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Digital Inputs to AGND . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Digital Outputs to AGND . . . . . . . . . . –0.3 V to VDD + 0.3 V
Operating Temperature Range
A, B Versions . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
T Version . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . +300°C
Power Dissipation (Any Package) to +75°C . . . . . . . . 450 mW
Derates above +75°C by . . . . . . . . . . . . . . . . . . . . 10 mW/°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PIN CONFIGURATIONS
DIP
SOIC
CONVST 1
CLK 2
RFS 3
RCLK 4
DR 5
DGND 6
VDD 7
AGND 8
VOUT 9
VSS 10
RO DAC 11
RI DAC 12
24 CONTROL
23 VDD
22 VSS
21 VIN
AD7868
TOP VIEW
(Not to Scale)
20 RO ADC
19 AGND
18 NC
17 DGND
16 TCLK
15 DT
14 TFS
13 LDAC
NC = NO CONNECT
CONVST 1
CLK 2
RFS 3
NC 4
RCLK 5
DR 6
DGND 7
VDD 8
AGND 9
VOUT 10
NC 11
VSS 12
RO DAC 13
RI DAC 14
AD7868
TOP VIEW
(Not to Scale)
28 CONTROL
27 VDD
26 VSS
25 NC
24 VIN
23 RO ADC
22 AGND
21 DGND
20 TCLK
19 NC
18 NC
17 DT
16 TFS
15 LDAC
NC = NO CONNECT
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7868 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. B
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