IDT6198S/L
CMOS STATIC RAM 64K (16K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES
(L Version Only) VLC = 0.2V, VHC = VCC - 0.2V
Typ. (1)
VCC @
Max.
VCC @
Symbol
Parameter
Test Condition
Min.
2.0v
3.0V
2.0V
3.0V
VDR
VCC for Data Retention
—
2.0
—
—
—
—
ICCDR
Data Retention Current
MIL.
—
10
COM’L. —
10
tCDR(3)
Chip Deselect to Data
CS ≥ VHC
0
—
Retention Time
VIN ≥ VHC or ≤ VLC
tR(3)
Operation Recovery Time
tRC(2)
—
|ILI|(3)
Input Leakage Current
—
—
15
600
900
15
150
225
—
—
—
—
—
—
—
2
2
NOTES:
1. TA = +25°C.
2. tRC = Read Cycle Time.
3. This parameter is guaranteed by device characterization but is not production tested.
Unit
V
µA
ns
ns
µA
2987 tbl 09
LOW VCC DATA RETENTION WAVEFORM
DATA
RETENTION
MODE
VCC
4.5V
tCDR
VDR ≥2V
CS
VIH
VDR
4.5V
tR
VIH
2987 drw 04
AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
DATAOUT
255Ω
GND to 3.0V
5ns
1.5V
1.5V
See Figures 1 and 2
2987 tbl 10
5V
480Ω
30pF*
DATAOUT
255Ω
5V
480Ω
5pF*
2987 drw 05
2987 drw 06
Figure 1. AC Test Load
Figure 2. AC Test Load
(for tOLZ, tCLZ, tOHZ, tWHZ, tCHZ and tOW)
*Includes scope and jig capacitances
6.3
4