Multi-Purpose Flash Plus + SRAM ComboMemory
SST32HF1642 / SST32HF1682 / SST32HF3242 / SST32HF3282
SST32HF1622C / SST32HF1642C / SST32HF3242C
Preliminary Specifications
TABLE 13: FLASH READ CYCLE TIMING PARAMETERS VDD = 2.7-3.6V
Symbol Parameter
Min
Max
Units
TRC
Read Cycle Time
70
ns
TCE
Chip Enable Access Time
70
ns
TAA
Address Access Time
70
ns
TOE
Output Enable Access Time
35
ns
TCLZ1
TOLZ1
BEF# Low to Active Output
OE# Low to Active Output
0
ns
0
ns
TCHZ1
BEF# High to High-Z Output
20
ns
TOHZ1
TOH1
OE# High to High-Z Output
Output Hold from Address Change
20
ns
0
ns
TRP1
RST# Pulse Width
500
ns
TRHR1
TRY1,2
RST# High before Read
RST# Pin Low to Read Mode
50
ns
20
µs
T13.1 1253
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
2. This parameter applies to Sector-Erase, Block-Erase and Program operations.
This parameter does not apply to Chip-Erase operations.
TABLE 14: FLASH PROGRAM/ERASE CYCLE TIMING PARAMETERS
Symbol Parameter
Min
Max
Units
TBP
Word-Program Time
10
µs
TAS
Address Setup Time
TAH
Address Hold Time
TCS
WE# and BEF# Setup Time
0
ns
30
ns
0
ns
TCH
TOES
TOEH
WE# and BEF# Hold Time
OE# High Setup Time
OE# High Hold Time
0
ns
0
ns
10
ns
TCP
TWP
TWPH1
TCPH1
TDS
TDH1
TIDA1
TSE
TBE
BEF# Pulse Width
WE# Pulse Width
WE# Pulse Width High
BEF# Pulse Width High
Data Setup Time
Data Hold Time
Software ID Access and Exit Time
Sector-Erase
Block-Erase
40
ns
40
ns
30
ns
30
ns
30
ns
0
ns
150
ns
25
ms
25
ms
TSCE
Chip-Erase
50
ms
T14.0 1253
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2005 Silicon Storage Technology, Inc.
14
S71253-03-000
5/05