SST32HF802-70-4C-LBK View Datasheet(PDF) - Silicon Storage Technology

Part Name

Description

MFG CO.

SST32HF802-70-4C-LBK

Multi-Purpose Flash (MPF) + SRAM ComboMemory

Silicon Storage Technology 

Multi-Purpose Flash (MPF) + SRAM ComboMemory

SST32HF202 / SST32HF402 / SST32HF802

Data Sheet

TOP VIEW (balls facing down)

SST32HF802

6

BES# VSS DQ1 A1 A2 A4 NC A9

5

A10 DQ5 DQ2 A0 A3 A7 NC A14

4

OE# DQ7 DQ4 DQ0 A6 A18 NC A15

3

A11 A8 A5 DQ8 DQ3 DQ12 A12 LBS#

2

A13 A17 UBS# BEF# DQ10 VDDF DQ6 DQ15

1

WE# VDDS A16 VSS DQ9 DQ11 DQ13 DQ14

ABCDEFGH

FIGURE 2: PIN ASSIGNMENTS FOR 48-BALL LBGA (10MM X 12MM)

TABLE 2: PIN DESCRIPTION

Symbol

AMS1-A0

Pin Name

Address Inputs

DQ15-DQ0 Data Input/output

Functions

To provide flash addresses, A16-A0 for 2M, A17-A0 for 4M, and A18-A0 for 8M.

To provide SRAM addresses, A16-A0 for 2M.

To output data during Read cycles and receive input data during Write cycles.

Data is internally latched during a flash Erase/Program cycle.

The outputs are in tri-state when OE# or BES# and BEF# are high.

BES#

SRAM Memory Bank Enable To activate the SRAM memory bank when BES# is low.

BEF#

Flash Memory Bank Enable

To activate the Flash memory bank when BEF# is low.

OE#

Output Enable

To gate the data output buffers.

WE#

Write Enable

To control the Write operations.

VDD

VDDF2

VDDS2

VSS

UBS#

LBS#

NC

Power Supply

Power Supply (Flash)

Power Supply (SRAM)

Ground

Upper Byte Control (SRAM)

Lower Byte Control (SRAM)

No Connection

2.7-3.3V power supply (for L3K package only)

2.7-3.3V power supply to flash only

2.7-3.3V power supply to SRAM only

To enable DQ15-DQ8

To enable DQ7-DQ0

Unconnected Pins

1. AMS = Most significant address

2. For SST32HF802 in the LBK package only

T2.4 1209

©2005 Silicon Storage Technology, Inc.

7

S71209-06-000

5/05

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