SPT7850SCN View Datasheet(PDF) - Fairchild Semiconductor

Part Name

Description

MFG CO.

SPT7850SCN

10-BIT, 20 MSPS, 140 mW A/D CONVERTER

Fairchild Semiconductor 

SPECIFICATION DEFINITIONS

APERTURE DELAY

OUTPUT DELAY

Aperture delay represents the point in time, relative to the

rising edge of the CLOCK input, that the analog input is

sampled.

APERTURE JITTER

The variations in aperture delay for successive samples.

EFFECTIVE NUMBER OF BITS (ENOB)

SINAD = 6.02N + 1.76, where N is equal to the effective

number of bits.

SINAD – 1.76

N=

6.02

Time between the clock’s triggering edge and output data

valid.

OVERVOLTAGE RECOVERY TIME

The time required for the ADC to recover to full accuracy

after an analog input signal 125% of full scale is reduced

to 50% of the full-scale value.

SIGNAL-TO-NOISE RATIO (SNR)

The ratio of the fundamental sinusoid power to the total

noise power. Harmonics are excluded.

SIGNAL-TO-NOISE AND DISTORTION (SINAD)

INPUT BANDWIDTH

Small signal (50 mV) bandwidth (3 dB) of analog input

stage.

The ratio of the fundamental sinusoid power to the total

noise and distortion power.

TOTAL HARMONIC DISTORTION (THD)

DIFFERENTIAL LINEARITY ERROR (DLE)

Error in the width of each code from its theoretical value.

(Theoretical = VFS/2N)

The ratio of the total power of the first 9 harmonics to the

power of the measured sinusoidal signal.

SPURIOUS FREE DYNAMIC RANGE (SFDR)

INTEGRAL LINEARITY ERROR (ILE)

Linearity error refers to the deviation of each individual

code (normalized) from a straight line drawn from –FS

through +FS. The deviation is measured from the edge of

each particular code to the true straight line.

The ratio of the fundamental sinusoidal amplitude to the

single largest harmonic or spurious signal.

SPT7850

4

6/15/01

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