SI4730-D60(2013) View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

MFG CO.

SI4730-D60
(Rev.:2013)

BROADCAST AM/FM/SW/LW RADIO RECEIVER

Silicon Laboratories 

Si4730/31/34/35-D60

Table 5. 3-Wire Control Interface Characteristics

(VA = 2.7 to 5.5 V, VD = 1.62 to 3.6 V, TA = –20 to 85 °C)

Parameter

Symbol

Test Condition

Min

Typ

Max Unit

SCLK Frequency

SCLK High Time

SCLK Low Time

SDIO Input, SEN to SCLKSetup

SDIO Input to SCLKHold

SEN Input to SCLKHold

SCLKto SDIO Output Valid

SCLKto SDIO Output High Z

SCLK, SEN, SDIO, Rise/Fall time

fCLK

tHIGH

tLOW

tS

tHSDIO

tHSEN

tCDV

tCDZ

tR, tF

Read

Read

0

—

2.5

MHz

25

—

—

ns

25

—

—

ns

20

—

—

ns

10

—

—

ns

10

—

—

ns

2

—

25

ns

2

—

25

ns

—

—

10

ns

Note: When selecting 3-wire mode, the user must ensure that a rising edge of SCLK does not occur within 300 ns before the

rising edge of RST.

SCLK 70%

30%

SEN 70%

30%

tR

tF

tS

tHSDIO

tHIGH

tLOW

tS

tHSEN

SDIO 70%

30%

A6-A5,

A7

R/W,

A0

A4-A1

D15

D14-D1

D0

Address In

Data In

Figure 4. 3-Wire Control Interface Write Timing Parameters

SCLK 70%

30%

tS

SEN 70%

30%

tHSDIO

tS

tCDV

tHSEN

tCDZ

70%

SDIO

30%

A6-A5,

A7

R/W,

A0

A4-A1

D15

D14-D1

D0

Address In

½ Cycle Bus

Turnaround

Data Out

Figure 5. 3-Wire Control Interface Read Timing Parameters

10

Rev. 1.2

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