HI3026A
clock applied to the A/D converter as the system clock.
The A/D converter can operate at fC (Min) = 100 MSPS in
this mode.
Digital Input Level and Supply Voltage Settings
The logic input level for the HI3026A supports ECL, PECL
and TTL levels.
The power supplies (DVEE3, DGND3) for the logic input
block must be set to match the logic input (CLK and RESET
signals) level.
TABLE 3. LOGIC INPUT LEVEL AND POWER SUPPLY
SETTINGS
DIGITAL
INPUT
LEVEL
ECL
PECL
TTL
DVEE3
-5V
0V
0V
DGND3
0V
+5V
+5V
SUPPLY
VOLTAGE
±5V
+5V
+5V
APPLICATION
CIRCUITS
(FIGURE)
(18)
(21)
(19)
(22)
(20)
(23)
CLK
HI3026A
CLK A
RESETN
HI3026A
CLK B
RESETN
CLK
8 BITS
CLKOUT
DATA
8 BITS
CLKOUT
DATA
FIGURE 9. WHEN THE RESET PULSE IS NOT USED
CLK
RESET PULSE
HI3026A
CLK A
RESETN
8 BITS
CLK
RESET
PULSE
CLKOUT
DATA
HI3026A
CLK B
RESETN
8 BITS
CLKOUT
DATA
FIGURE 10. WHEN THE RESET PULSE IS USED
11