APPLICATIONS
BIPOLAR
ANALOG INPUT
±10V
VDD
DIGITAL
INPUT
MAGNITUDE
BITS
MSB
4
LSB
13
VREF
15
14
AD7533
3
GND
RFB
16
IOUT1
1
2
IOUT2
10kΩ
1/2 AD7512DIJN
5kΩ
OP97
SIGN BIT
Figure 13. 10-Bit and Sign Multiplying DAC
10kΩ
VOUT
OP97
AD7533
DIGITAL
FREQUENCY
CONTROL
WORD
CALIBRATE
10V
4.7kΩ
1kΩ
+15V
VDD
NC
6.8V
(2)
MSB
4
LSB
13
VREF
15
14
AD7533
16
IOUT1
1
2 IOUT2
OP97
10kΩ
1%
Ct
OP97
10kΩ
1%
3
GND
f
=
N
(
1
8RtCt
)
Rt = 10kΩ
0 < N ≤ (1 210)
Figure 14. Programmable Function Generator
SQUARE
WAVE
TRIANGULAR
WAVE
VIN
IOUT2
2
1
IOUT1
+15V
RFB
16
14
AD7533
MSB
4
LSB
13
BIT 1
DIGITAL
INPUT
“D”
BIT 10
3
15
VREF
VOUT =
–VIN
D
GND
VOUT
where:
D=
BIT
21
1
+
BIT 2
22
+ …BI2T1010
0 < D ≤ 1023
1024
Figure 15. Divider (Digitally Controlled Gain)
VREF
TEST INPUT
+15V (0 TO – VREF)
DIGITAL
INPUT
(TEST LIMIT)
MSB
4
LSB
13
15
14
AD7533
3
16
IOUT1
1
2
IOUT2
AD790
COMPARATOR
FAIL/PASS
TEST
GND
Figure 17. Digitally Programmable Limit Detector
VREF
+15V
BIT 1
DIGITAL
INPUT
“D”
BIT 10
MSB
4
LSB
13
15
14
AD7533
RFB
16
IOUT1
1
2
IOUT2
R1
R2
–VREFD
.
VOUT
3
GND
VOUT = VREF =
R2
– R1D
R1 + R2
R1 + R2
where:
D=
BIT
21
1
+
BIT 2
22
+ …BI2T1010
0 < D ≤ 1023
1024
Figure 16. Modified Scale Factor and Offset
Rev. C | Page 9 of 12