FUNCTIONAL BLOCK DIAGRAM
4 Meg x 16 SDRAM
64Mb: x4, x8, x16
SDRAM
CKE
CLK
CS#
WE#
CAS#
RAS#
CONTROL
LOGIC
BANK3
BANK2
BANK1
MODE REGISTER
12
A0-A11,
BA0, BA1
14
ADDRESS
REGISTER
REFRESH 12
COUNTER
ROW-
12
ADDRESS
MUX
12
BANK0
ROW-
ADDRESS
LATCH
&
DECODER
4096
BANK0
MEMORY
ARRAY
(4,096 x 256 x 16)
SENSE AMPLIFIERS
4096
2
BANK
CONTROL
LOGIC
2
COLUMN-
ADDRESS
8
8
COUNTER/
LATCH
I/O GATING
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
256
(x16)
COLUMN
DECODER
2
2
DATA
16
OUTPUT
REGISTER
16
DATA
16
INPUT
REGISTER
DQML,
DQMH
DQ0-DQ15
64Mb: x4, x8, x16 SDRAM
64MSDRAM_F.p65 – Rev. F; Pub. 1/03
6
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©2003, Micron Technology, Inc.