ML7000-01 View Datasheet(PDF) - Oki Electric Industry
Part Name
Description
MFG CO.
ML7000-01 Datasheet PDF : 19 Pages
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¡ Semiconductor
ML7000-01/02/03/ML7001-01/02/03
ABSOLUTE MAXIMUM RATINGS
Parameter
Power Supply Voltage
Analog Input Voltage
Digital Input Voltage
Symbol
VDD
VAIN
VDIN
Condition
—
—
—
Rating
–0.3 to +7
–0.3 to VDD + 0.3
–0.3 to VDD + 0.3
Unit
V
V
V
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Condition
Min. Typ. Max. Unit
Power Supply Voltage
VDD
—
4.75 5.00 5.25
V
2.70 3.00 3.30
Operating Temperature
Ta
—
–30
+25
+85
°C
Analog Input Voltage
VAIN Connect AIN– and GSX
—
—
2.4
—
—
1.2
VPP
High Level Input Voltage
Low Level Input Voltage
VIH XSYNC, RSYNC, BCLK,
PCMIN, PDN, ALAW
VIL
2.2
—
0.45¥VDD —
VDD
V
VDD
0
—
0.8
V
0
— 0.16¥VDD
64, 96, 128, 192, 200, 256,
Clock Frequency
FC BCLK
384, 512, 768, 1024, 1536, kHz
1544, 2048
Sync Pulse Frequency
6.0
FS XSYNC, RSYNC (–40 to +75 °C) 6.0
8.0
9.0
kHz
8.0
10.0
Clock Duty Ratio
DC BCLK
40
50
60
%
Digital Input Rise Time
tlr XSYNC, RSYNC, BCLK,
—
—
50
ns
Digital Input Fall Time
tlf PCMIN, PDN
—
—
50
ns
Transmit Sync Pulse Setting Time
tCX BCLKÆXSYNC, See Fig. 1
tXC XSYNCÆBCLK, See Fig. 1
50
—
—
ns
50
—
—
ns
XSYNC Setup Time
tXS
—
50
—
—
ns
XSYNC Hold Time
tXH
—
50
—
—
ns
Receive Sync Pulse Setting Time
tCR BCLKÆRSYNC, See Fig. 1
tRC RSYNCÆBCLK, See Fig. 1
50
—
—
ns
50
—
—
ns
RSYNC Setup Time
tRS
—
50
—
—
ns
RSYNC Hold Time
tRH
—
50
—
—
ns
PCMIN Setup Time
tDS
—
50
—
—
ns
PCMIN Hold Time
tDH
—
50
—
—
ns
Digital Output Load
RDL Pull-up resistor
CDL
—
0.5
—
—
kW
—
—
100 pF
Transmit gain stage, Gain = 0 dB –10
—
+10 mV
Analog Input Allowable DC Offset Voff Transmit gain stage, Gain = +20 dB –100
—
+100 mV
Allowable Jitter Width
— XSYNC, RSYNC, BCLK
—
—
1000 ns
Values above the dotted line are for ML7000-xx; those below, for ML7001-xx.
9/19
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