ML63187B-XXXGA View Datasheet(PDF) - Oki Electric Industry
Part Name
Description
MFG CO.
ML63187B-XXXGA
Oki Electric Industry
ML63187B-XXXGA Datasheet PDF : 36 Pages
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1Semiconductor
FEDL63187B-06
ML63187B/63189B
Table 1 Pin Descriptions (Basic Functions) (continued)
Function
Symbol
Pin No.
Pad No.
Type
ML63187B ML63189B ML63187B ML63189B
Description
TST1
61
63
79
89
I
Input pins for testing
A pull-down resistor is internally connected to
Test
these pins.
TST2
62
64
80
90
I
The user cannot use these pins.
Reset input pin
Setting this pin to “H” Ievel puts this device
into a reset state.
Then, setting this pin to “L” Ievel starts
executing an instruction from address 0000H.
A pull-down resistor is internally connected to
Reset RESET
58
60
76
86
I this pin.
An option of using RESET sampling circuit or
not is chosen by the mask option.
When using RESET sampling circuit, the
system reset mode is entered by holding the
RESET pin at a “H” Ievel for 1 ms or more.
Melody
MD
MDB
63
66
81
91
O Melody output pin (non-inverted output)
64
67
82
92
O Melody output pin (inverted output)
P0.0/INT5
86
110
4-bit input ports
P0.1/INT5
87
111
Pull-up resistor input, pull-down resistor input,
—
—
I or high-impedance input is selectable for
P0.2/INT5
88
112
each bit.
P0.3/INT5
89
113
Applied to the ML63189B only.
P9.0
82
106
4-bit input-output ports
P9.1
P9.2
83
107
In input mode, pull-up resistor input, pull-
—
84
—
108 I/O down resistor input, or high-impedance input
P9.3
PA.0
PA.1
PA.2
85
109
is selectable for each bit.
78
102
In output mode, P-channel open drain output,
N-channel open drain output, CMOS output,
—
79
—
103
I/O or high-impedance output is selectable for
80
104
each bit.
PA.3
81
Port PB.0/INT0/
105
P9.0 to P9.3 and PA.0 to PA.3 are applied to
the ML63189B only.
TM0CAP/
75
74
88
98
TM0OVF
PB.1/INT0/
TM1CAP/
76
75
89
99
TM1OVF
I/O
PB.2/INT0/
77
76
90
100
T02CK
PB.3/INT0/
T13CK
78
77
91
101
PE.0/SIN
71
70
84
94
PE.1/SOUT 72
71
85
95
I/O
PE.2/SCLK 73
72
86
96
PE.3/INT2 74
73
87
97
14/36
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