MIC9131BM View Datasheet(PDF) - Micrel
Part Name
Description
MFG CO.
MIC9131BM Datasheet PDF : 19 Pages
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MIC9131
MIC9131
SET
S
Q
Micrel, Inc.
5V
4µA
12 SS
VCC 2
1.21V
VCC
UVLO
R
/Q
RESET
VIN
R1
R2
AGND 11
UVLO 13
UVLO
LINE
UVLO
Figure 4: UVLO and Soft Start Circuits
16
OUT
15
PGND
VCC Undervoltage Lockout
The VCC voltage is internally divided down and compared to
a 1.21V internal bandgap reference. As VCC rises above the
turn-on threshold, it disables the VCC undervoltage lockout
circuit. Once above the turn-on threshold, hysteresis prevents
the lockout circuit from disabling the IC until the VCC voltage
falls below the lower threshold.
Line Undervoltage Circuit (UVLO)
The line voltage is monitored by an external resistor divider
and fed into the negative input of the line UVLO comparator.
As the comparator trip point is exceeded, the line UVLO circuit
is disabled. Hysteresis built into the comparator prevents the
circuit from toggling on an off in the presence of noise or a
high input line impedance.
The line voltage turn-on trip point is:
VLINE_ON
= VTHRESHOLD
×
R2
R1+ R2
where: VTHRESHOLD is the voltage level of the internal
comparator reference, typically 1.21V.
The line hysteresis is equal to:
VHYSTERESIS=
VHYST
× R1+ R2
R2
where: VHYST is the internal hysteresis level, typically
75mV.
VHYSTERESIS is the hysteresis of the line input
voltage
The MIC9131 will be disabled when the line voltage drops
back down to:
V LINE_OFF= V LINE_ON − VHYTERESIS=
( ) VTHRESHOLD − VHYST
× R2
R1+ R2
Enable
A low level on the enable pin turns off all the functions of the
MIC9131 and places it in a low quiescent current state. The
output driver is in a low state. When the enable pin is pulled
high, the MIC9131 goes through its normal start up sequence
including undervoltage lock out and soft start. When not used,
the pin should be connected to VCC.
Oscillator Block
An external resistor and capacitor set the oscillator frequency.
The MIC9131 contains an internal divide-by-four circuit that
limits the maximum duty cycle at the gate drive to 75%. The
oscillator frequency of the MIC9131 is four times the output
switching frequency.
Oscillator Pin
The operation of the oscillator is shown in Figure 5. The volt-
age waveform at the OSC pin is a sawtooth whose amplitude
increases as capacitor Cosc is charged up through ROSC from
the 5VBIAS. When the OSC pin voltage reaches the internal
comparator upper threshold, COSC is quickly discharged to
zero volts by an internal MOSFET. After a brief delay, typi-
cally 75ns, the internal MOSFET is turned off and the COSC
charges, repeating the cycle. Figure 5 show the relationship
between the oscillator and gate drive waveforms. The delays
in the IC force the duty cycle of the gate drive signal to be
slightly less than 75% duty cycle.
For VBIAS = 5V and a peak oscillator waveform voltage of
3V, the design equations simplify to:
Charging
tCHARGE = 0.92 ×R t × Ct
Discharging
tDISCHARGE ≈ 40 × C t
August 2006
11
M9999-080206
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