56F8165(2007) View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

MFG CO.

56F8165
(Rev.:2007)

16-bit Digital Signal Controllers

Freescale Semiconductor 

2.2 Signal Pins

After reset, each pin is configured for its primary function (listed first). Any alternate functionality must

be programmed.

EMI is not functional in this package; since only part of the address/data bus is bonded out, use as GPIO

pins.

Note: Signals in italics are NOT available in the 56F8165 device.

If the “State During Reset” lists more than one state for a pin, the first state is the actual reset state. Other

states show the reset condition of the alternate function, which you get if the alternate pin function is

selected without changing the configuration of the alternate peripheral. For example, the A8/GPIOA0 pin

shows that it is tri-stated during reset. If the GPIOA_PER is changed to select the GPIO function of the

pin, it will become an input if no other registers are changed.

Signal

Name

VDD_IO

VDD_IO

VDD_IO

VDD_IO

VDD_IO

VDD_IO

VDD_IO

VDDA_ADC

VDDA_OSC_

PLL

VSS

VSS

VSS

VSS

VSS

Table 2-2 Signal and Package Information for the 128-Pin LQFP

Pin No.

Type

State

During

Reset

Signal Description

4

Supply

14

I/O Power — This pin supplies 3.3V power to the chip I/O

interface and also the Processor core throught the on-chip voltage

regulator, if it is enabled.

25

36

62

76

112

94

Supply

ADC Power — This pin supplies 3.3V power to the ADC modules.

It must be connected to a clean analog power supply.

72

Supply

Oscillator and PLL Power — This pin supplies 3.3V power to the

OSC and to the internal regulator that in turn supplies the Phase

Locked Loop. It must be connected to a clean analog power

supply.

3

Supply

21

Ground — These pins provide ground for chip logic and I/O

drivers.

35

59

65

56F8365 Technical Data, Rev. 7

18

Freescale Semiconductor

Preliminary

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