MC14014B, MC14021B
ÎÎSÎÎWIÎÎTCHÎÎINGÎÎCHÎÎARÎÎACÎÎTERÎÎISTÎÎICSÎÎ(NoÎÎte 5)ÎÎ(CLÎÎ= 50ÎÎpF,ÎÎTA=ÎÎ25_ÎÎC) ÎÎÎÎVDDÎÎÎÎÎÎÎÎÎÎÎÎTyÎÎp ÎÎÎÎÎÎÎÎÎÎÎÎ
Characteristic
Symbol
Vdc
Min
(Note 6)
Max
Unit
Output Rise and Fall Time
tTLH, tTHL = (1.5 ns/pF) CL + 25 ns
tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns
tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns
tTLH,
ns
tTHL
5.0
−
100
200
10
−
50
100
15
−
40
80
Propagation Delay Time (Clock to Q, P/S to Q)
tPHL, tPLH = (1.7 ns/pF) CL + 315 ns
tPHL, tPLH = (0.66 ns/pF) CL + 137 ns
tPHL, tPLH = (0.5 ns/pF) CL + 90 ns
tPLH,
ns
tPHL
5.0
−
400
800
10
−
170
340
15
−
115
230
Clock Pulse Width
tWH
5.0
400
150
−
ns
10
175
75
−
15
135
40
−
Clock Frequency
fcl
5.0
−
3.0
1.5
MHz
10
−
6.0
3.0
15
−
8.0
4.0
Parallel/Serial Control Pulse Width
tWH
5.0
400
150
−
ns
10
175
75
−
15
135
40
−
Setup Time
P/S to Clock
tsu
5.0
200
100
−
ns
10
100
50
−
15
80
40
−
Hold Time
Clock to P/S
th
5.0
20
– 2.5
−
ns
10
20
– 10
−
15
25
0
−
Setup Time
Data (Parallel or Serial) to
Clock or P/S
tsu
5.0
350
150
−
ns
10
80
50
−
15
60
30
−
Hold Time
Clock to Ds
th
5.0
45
0
−
ns
10
35
0
−
15
35
5
−
Hold Time
Clock to Pn
th
5.0
50
25
−
ns
10
45
20
−
15
45
20
−
Input Clock Rise Time
tr(cl)
5.0
−
10
−
15
−
−
15
ms
−
5
−
4
5. The formulas given are for the typical characteristics only at 25_C.
6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
http://onsemi.com
4