MB91266PMC-G-XXXE1 View Datasheet(PDF) - Fujitsu

Part Name

Description

MFG CO.

MB91266PMC-G-XXXE1

(MB91265A Series) 32-bit Proprietary Microcontrollers

Fujitsu 

MB91265 Series

Clock Control Block

Input the “L” signal to the INIT pin to assure the clock oscillation stabilization wait time.

Switch Shared Port Function

To switch between the use as a port and the use as a dedicated pin, use the port function register (PFR) .

Low Power Consumption Mode

To enter the standby mode, use the synchronous standby mode (set with the SYNCS bit as bit 8 in the TBCR :

timebase counter control register) and be sure to use the following sequence

(LDI

#value_of_standby, R0) : value_of_standby is write data to STCR.

(LDI

#_STCR, R12)

: _STCR is address (481H) of STCR.

STB

R0, @R12

: Writing to standby control register (STCR)

LDUB @R12, R0

: STCR read for synchronous standby

LDUB @R12, R0

: Dummy re-read of STCR

NOP

: NOP × 5 for arrangement of timing

NOP

NOP

NOP

NOP

In addition, please set I flag, ILM, and ICR to diverge to the interruption handler that is the return factor after the

standby returns.

• Please do not do the following when the monitor debugger is used.

• Break point setting for above instruction lines

• Step execution for above instruction lines

17

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