MAX5802AAUBT(2012) View Datasheet(PDF) - Maxim Integrated

Part Name

Description

MFG CO.

MAX5802AAUBT
(Rev.:2012)

Ultra-Small, Dual-Channel, 8-/10-/12-Bit Buffered Output DACs with Internal Reference and I2C Interface

Maxim Integrated 

MAX5800/MAX5801/MAX5802

Ultra-Small, Dual-Channel, 8-/10-/12-Bit Buffered Output

DACs with Internal Reference and I2C Interface

ELECTRICAL CHARACTERISTICS (continued)

(VDD = 2.7V to 5.5V, VDDIO = 1.8V to 5.5V, VGND = 0V, CL = 200pF, RL = 2kI, TA = -40NC to +125NC, unless otherwise noted. Typical

values are at TA = +25NC.) (Note 2)

PARAMETER

SYMBOL

CONDITIONS

Supply Current (Note 10)

VREF = 2.048V

Internal reference VREF = 2.5V

IDD

VREF = 4.096V

External reference

VREF = 3V

VREF = 5V

Both DACs off, internal reference ON

Power-Down Mode Supply

Current

Both DACs off, internal reference OFF,

IPD

TA = -40NC to +85NC

Both DACs off, internal reference OFF,

TA = +125NC

DIGITAL INPUT CHARACTERISTICS (SCL, SDA, ADDR, CLR)

Input High Voltage

2.2V < VDDIO < 5.5V

VIH

1.8V < VDDIO < 2.2V

Input Low Voltage

2.2V < VDDIO < 5.5V

VIL

1.8V < VDDIO < 2.2V

Hysteresis Voltage

Input Leakage Current

Input Capacitance (Note 10)

ADDR Pullup/Pulldown Strength

DIGITAL OUTPUT (SDA)

VH

IIN

CIN

RPU, RPD

VIN = 0V or VDDIO (Note 10)

(Note 11)

Output Low Voltage

VOL

ISINK = 3mA

I2C TIMING CHARACTERISTICS (SCL, SDA, CLR)

SCL Clock Frequency

fSCL

Bus Free Time Between a STOP

and a START Condition

tBUF

Hold Time Repeated for a

START Condition

SCL Pulse Width Low

SCL Pulse Width High

Setup Time for Repeated START

Condition

Data Hold Time

Data Setup Time

tHD;STA

tLOW

tHIGH

tSU;STA

tHD;DAT

tSU;DAT

MIN TYP MAX UNITS

0.55 0.75

0.60 0.80

0.65 0.90

mA

0.40 0.60

0.55 0.75

140

0.5

1

FA

1.2

2.5

0.7 x

VDDIO

V

0.8 x

VDDIO

V

0.3 x

VDDIO

V

0.2 x

VDDIO

0.15

V

Q0.1

Q1

FA

10

pF

30

50

90

kI

0.2

V

400

kHz

1.3

Fs

0.6

Fs

1.3

Fs

0.6

Fs

0.6

Fs

0

900

ns

100

ns

Maxim Integrated

  6

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